Semiconductor Engineering .:. Front End Comes To The Back End
By Jeff Chappell For outsourced assembly and test (OSAT) houses either planning for or already offering through-silicon via (TSV) capability for their 3D packaging efforts, this has meant the front end is coming to the back end, in a manner of speaking.
Packaging and Delivery Methodology for: wafer, die and ICs
There are many ways to deliver, package and transport silicon products. Here's a short primer that provides the basic facts regarding how silicon can be packed and delivered to ensure safe transportation with minimum damages.
Semi-Conductor and Wafer Lapping - Engis Corp.
Our laboratory-based solution development provides you with real benefits in terms of shorter cycle times, reduced overall consumables costs and a shortened CMP process step due to better semi-finishing processes.
TSV MEOL (Mid-End-Of-Line) and its Assembly/Packaging ...
such as bonding, fine pitch bumping, back grinding and thin wafer handling. Final packaging is required to connect the device to the PWB. Due to assembly
Wafer Works Corporation - Products - Epitaxial Wafers
Wafer Works also provides high-quality 4" - 8" epitaxial wafers and buried layer epitaxial process services, meeting customer's power device and CMOS demands and offering one stop-shopping services.
Wafer Works Corporation - Products - Polished Silicon Wafers
Wafer Works' polished silicon wafers consist of 4" - 8" low defect, superior flatness silicon wafers, containing dopants such as boron, phosphorus, arsenic, and antimony to meet the specific customer requirements.
Intersurface Dynamics Inc. - Welcome
Process Chemicals for Semiconductor, Silicon Substrate, Technical Ceramics, precision/Electro-Optic, Data Storage Quartz, and Ophthalmic Lens Manufacturing
Silicon Valley Microelectronics - Silicon Wafer Supplier
Silicon Valley Microelectronics (SVM) is a silicon wafer supplier that carries silicon substrates, as well as specialty materials like SOI, SiC, Glass, Ge, InP, GaAs, and more!
Wafer dicing - Wikipedia
In the context of manufacturing integrated circuits, wafer dicing is the process by which die are separated from a wafer of semiconductor following the processing of the wafer.
An overview of through-silicon-via technology and ...
Through-silicon-via (TSV) technology is conceptually simple, but there are many problems to overcome for high volume manufacturing. After a decade of research, TSV technology has entered high volume manufacturing for simple applications, such as CMOS image sensors and SiGe power amplifiers.